Syed Muhammad Muslim
NUST
· 2025
Email
muslimmohammad705@gmail.com
Phone
923105451115
LinkedIn
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GitHub
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Academic
Program
BE Electrical Engineering
CGPA
3.47
Year
2025
Education
SEECS, NUST
Address
Taxila , Pakistan
DOB
—
Career
Current role
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Target role
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Skills
Raspberry pi, tinker board, Vivado, Stm32/arm, Arm, avr, arduino, C/c++, python, assembly, Matlab, embedded systems, RTOS, Self-mixing interferometry, convolutional neural networks, In-memory Computing Unit, Cadence Virtuoso, Verilog HDL, RISC-V, LaTeX, GeoGebra, AES hardware accelerator, FPGA, Modelsim, Complex Arithmetic Logic Unit, pyaudio, numpy, scipy, FFT-based signal analysis
Interests / quote
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Details Technical Skills Soft Skills Reference Syed Muhammad Muslim Cell: 923105451115 Email: muslimmohammad705@gmail.com Address: CB 225 A TIMBER MARKET HASSAN COLONY TAXILA Taxila , Pakistan Raspberry pi, tinker board Vivado Stm32/arm Arm, avr, arduino C/c++, python, assembly Matlab To be furnished upon request. Professional Profile Please update objective section. Education BE Electrical Engineering School of Electrical Engineering and Computer Science , 3.47 Matric / O levels , (2019) Intermediate / A levels , (2021) FSc F.G Degree Collage, Wah Cantt , 1072 (2021) Matriculation F.G Public High School , 1022 (2021) Internship Experience Electronic Design & Automation Center (EDSAC) ( 01-Jul-2023 - 09-Sep-2023 ) • Optimized the SC-TFSP lessor sensing algorithm for efficient execution on Jetson Nano. • Led a team of two in designing and conducting lab tutorials on embedded systems and RTOS for SAMI trainees. • Fringe detection of Self-mixing interferometry signal using the convolutional neural networks. • Contrib System-on-Chip lab ( 24-Jun-2024 - 15-Sep-2024 ) • Orchestrated the internship project "SRAM-based In-memory Computing Unit for AI Acceleration." • Designed the complete microarchitecture for the system. • Led a team of three in implementing the design using Cadence Virtuoso and Verilog HDL. • Designed the interface for the In-memory unit for the RISC-V Photomath ( 01-May-2022 - 30-Aug-2022 ) • Provided detailed mathematical solutions to problems in the domains of Geometry, Algebra, and Calculus. • Utilized LaTeX for writing mathematical equations and explanations. • Used GeoGebra for illustrations and graphical representations. Projects AES over UART • Designed an AES hardware accelerator for communication between two FPGA nodes via UART.• Implementation was done in Verilog HDL for Intel's DE-10 FPGA.• Simulations were conducted using Modelsim. Complex Arithmetic Logic Unit Designed an ALU that can handle the addition, Multiplication, Subtraction, and Division of the Complex numbers Whistle Detection and Localization System • Developed a real-time whistle detection and localization system using three microphones and Python. • Implemented concurrent audio processing with threading, using libraries like pyaudio for stream handling, numpy and scipy for FFT-based signal analysis. • Designed a multi-threaded architecture to capture CONV-ENGINE • Hardware Accelerator for 1D and 2D convolution. • Able to perform 256 additions in parallel • Able to perform 256 multiplications in parallel
AI enrichment
Syed Muhammad Muslim is a recent Electrical Engineering graduate with internship experience in embedded systems, FPGA design, and hardware acceleration. He has demonstrated proficiency in Verilog, C/C++, and Python through projects involving AES accelerators, ALUs, and CNN-based signal processing.
Skills (AI)
["Verilog HDL", "C/C++", "Python", "FPGA Design", "Embedded Systems", "RTOS", "Cadence Virtuoso", "RISC-V", "MATLAB", "Assembly", "STM32/ARM", "Arduino", "Raspberry Pi", "Vivado", "Modelsim", "Signal Processing", "Hardware Acceleration"]
Status: ai_done