Umer Ali

Jhelum , Pakistan Vivado Verilog programming C++ Python Teamwork, flexibility

I am a final-year Electrical Engineering student with a keen interest in digital design and computer architecture. My Final Year Project involves developing a multi-core Linux-capable RISC-V processor, reflecting my expertise in hardware design and system integration. In addition to my academic pursuits, I have independently explored robotics and machine learning, expanding my knowledge of cutting-edge technologies. I am a motivated learner with a strong passion for innovation and problem-solving in the fields of digital systems and computer architecture.