Sarah Yasrab
NUST
· 2026
Email
sarahyasrab13@gmail.com
Phone
923154247144
GitHub
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Academic
Program
Electrical Engineering
CGPA
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Year
2026
Education
SEECS
Address
Islamabad, Pakistan
DOB
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Career
Current role
HR and marketing manager at Scholarmed
Target role
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Skills
Digital IC Design, RISC-V processor architecture, embedded systems, RTL development, hardware verification, C language, DLD, Computer Architecture, Vivado, Quartus, PCB Design, Altium, KiCad, Proteus simulation, Arduino, STM32F4, Assembly, Graphic Designing, Canva
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Sarah Yasrab Cell: 923154247144 | Email: sarahyasrab13@gmail.com LinkedIn: https://www.linkedin.com/in/sarahyasrab160/ Address: house no 13 street 20 sector b orchard area , Islamabad , Pakistan PROFESSIONAL PROFILE Final-year Electrical Engineering student at NUST with hands-on experience in Digital IC Design, RISC-V processor architecture, and embedded systems. Seeking an entry-level role or graduate position where I can contribute to processor design, RTL development, and hardware verification while continuously learning and building scalable, real-world hardware solutions. EDUCATION EE Seecs , islamabad INTERNSHIP EXPERIENCE Nust Chip Design Centre 18-Mar-2025 - 30-Aug-2025 I completed training in digital ic design during my internship, It included c language module, dld module, riscv and computer architecture module and completed a riscv pipelined processor with data and control hazards reduced by stalls and forwarding in vivado. Mine lab rimms Nust 03-Jun-2024 - 29-Aug-2024 I learned multi layer pcb designing in altium. I gain a handson experience by completing different analog and digital circuits by simulating them and aking their pcb as final projects i made 16bit sequence detector and made pcb of arduino nano board FINAL YEAR PROJECT Design and Verification of Risc-V Vector Processor IP Design and Verification of a RISC-V Vector Processor IP integrated with a scalar core (Concordia-1) using the PCPI interface. Involves RTL development, performance-optimized vector execution, and verification using Google’s RISC-V DV framework. TECHNICAL EXPERTISE pcb design I have handson experience of designing pcb in altium and kicad Proteus simulation I have handson experience of making an 8 bit computer in proteus Vivado I have handson experience of desiging rtl in vivado and quartus embedded systems I have experience of writing c and assembly codes to run on arduino and stm 32f4 Graphic Designing I work remotely with a company Scholarmed as their HR and marketing manager where I also make posts for instagram on Canva
AI enrichment
Sarah Yasrab is a final-year Electrical Engineering student with practical experience in digital IC design, RISC-V processor architecture, and embedded systems. She has completed internships involving RTL development in Vivado and PCB design in Altium, alongside a final year project on RISC-V vector processor verification.
Skills (AI)
["Digital IC Design", "RISC-V Architecture", "RTL Development", "Vivado", "Quartus", "PCB Design", "Altium", "KiCad", "Embedded Systems", "C Programming", "Assembly Language", "STM32", "Arduino", "Proteus Simulation", "Hardware Verification"]
Status: ai_done
Provenance
Source file: SEECS - Electrical Engineering-2026.pdfFrom job #259 page 4
Created: 1778168427