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Ali Masood Khan

NUST · 2026

alimasoodkhanamk@gmail.com

Phone

923333496806

https://www.linkedin.com/in/alimasoodkhan

GitHub

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Academic

Program

BS Electrical Engineering

CGPA

3.42

Year

2026

Education

NUST

Address

House #9 , Indus road, east park , Wah cantt , Pakistan

DOB

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Career

Current role

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Target role

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Skills

Python, OpenCV, Fire Detection FSM, Enumerations, Design Hierarchy, GDB, Linux, RISC-V, Assembly, Venus, RISC-V32I processor, Hazard handling, Testbenches, Computer architecture, C programming, AutoCAD, PLCs, Bare metal programming, DE-10 SoC, Linux kernel, HPS, ARM Cortex A9, FPGA hardware, Kernel drivers, Character drivers, I/O peripherals, Accelerometer, FPGA accelerated DSP algorithms, Canny Edge Detector, DMA, Image stitching, Feature detection algorithms, Customized ORB, HLS, FAST, rBRIEF, HDL, Micro-architecture, AXI interfaces, Memory Controller, DDR access, Gaussian pyramids

Interests / quote

The rise in Edge computing and localized calculation has sparked my interest in developing optimized hardware accelerators, GPUs and memory systems. I intend to excel in the industry and gain valuable insight and experience to develop better IPs and solutions by use of my cognitive and social abilities.

Verbatim text

The exact text the LLM saw on the page (or the booklet text from the old import). This is what powers semantic search.

Ali Masood Khan
Cell: 923333496806 | Email: alimasoodkhanamk@gmail.com
LinkedIn: https://www.linkedin.com/in/alimasoodkhan
Address: House #9 , Indus road, east park , Wah cantt , Pakistan
PROFESSIONAL PROFILE
The rise in Edge computing and localized calculation has sparked my interest in developing optimized hardware accelerators,
GPUs and memory systems. I intend to excel in the industry and gain valuable insight and experience to develop better IPs and
solutions by use of my cognitive and social abilities.
EDUCATION
BS Electrical Engineering
National University of Sciences and Technology , Islamabad , 3.42 (2026)
INTERNSHIP EXPERIENCE
NUST CHIP DESIGN CENTER
19-Feb-2025 - 25-Sep-2025
• Implemented a Fire Detection FSM after learning about procedural blocks, Enumerations and Design Hierarchy. Introduced to
conﬁgurable design using parameters. • Learned how to inspect and debug memory, solve stack errors and segmentation faults, analyze core dumps using GDB for Linux. • Worked on RISC-V based ISA and implemented sorting algorithms in assembly using venus. • Built a single cycle RISC-V32I processor and then pipelined it, which later required hazard handling. The processor was able
to run Machine code without hindrance. • Wrote testbenches to verify top and hidden modules in projects. • Thorough review of computer architecture and C programming.
PAKISTAN ORDNANCE FACTORIES
01-Aug-2024 - 01-Sep-2024
• Worked in the Drawing oﬃce and calculated load and cable requirements for a neighborhood in Wah Cantt. • Learned how to read
Elecrical drawings and use AutoCAD. • Gained insightful experience on how an organization runs itself. Observed maintenance and improvement of a system using PLCs.
ELECTRONIC SYSTEM DESIGN AUTOMATION CENTER, NUST
03-Jun-2024 - 31-Jul-2024
• Bare metal programming on DE-10 SoC board. • Ran Linux kernel on the HPS of DE-10 SoC board(ARM Cortex A9.) • Developed Linux applications that communicate with FPGA hardware including kernel and character drivers and I/O peripherals like
accelerometer. • Other tasks included running FPGA accelerated DSP algorithms. Made a Canny Edge Detector implementation on the FPGA and used DMA to access images and calculate edges.
FINAL YEAR PROJECT
Design of Real-time 360 degrees image-stitching for Panoramic Vision Systems on FPGA
• The FPGA being used is XC7Z020-1CLG4C featured on the Zybo Z7-20. • Literature Review of image stitching and Feature detection algorithms. • Proposed an customized ORB for feature detection. • Used OpenCV’s image stitching algorithms to get compare diﬀerent techniques. • Built HLS implementations of FAST, rBRIEF • Designed and ﬁnalized Micro-architecture for HDL implementation. • Currently working on designing AXI interfaces and Memory Controller for DDR access My contribution includes the interfacing of the modules using AXI and building sub-modules for ORB and gaussian pyramids.
TECHNICAL EXPERTISE
Python and OpenCV

AI enrichment

Ali Masood Khan is a BS Electrical Engineering student at NUST with a focus on hardware design, computer architecture, and FPGA development. He has practical experience in RISC-V processor implementation, Linux driver development, and image processing algorithms through internships and a final year project.

Skills (AI)

["Verilog", "RISC-V", "FPGA", "Linux Kernel", "C Programming", "Python", "OpenCV", "HLS", "AXI Interfaces", "GDB", "AutoCAD", "PLC"]

Status: ai_done

Provenance

Source file: SEECS - Electrical Engineering-2026.pdf
From job #259 page 114
Created: 1778168427