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Hasan Ahmad

NUST · 2026

hasanahmad.w@gmail.com

Phone

923402459599

https://www.linkedin.com/in/hasan-ahmad-/

GitHub

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Academic

Program

B.E. EE

CGPA

3.95

Year

2026

Education

SEECS

Address

Islamabad, Pakistan

DOB

—

Career

Current role

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Target role

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Skills

Digital Logic Design, RTL, Embedded Systems, Verilog, SystemVerilog, FPGA, Computer Architecture, AI, NLP, UVM, OpenFPGA, AMD Vivado, Cadence Xcelium, JTAG, C#, Unity

Verbatim text

The exact text the LLM saw on the page (or the booklet text from the old import). This is what powers semantic search.

Hasan Ahmad
Cell: 923402459599 |  Email: hasanahmad.w@gmail.com
LinkedIn: https://www.linkedin.com/in/hasan-ahmad-/
Address: C-5/1, Naval Residential Complex, Sector E-8 , Islamabad , Pakistan
PROFESSIONAL PROFILE
Electrical Engineering undergraduate with a strong focus on Digital Logic Design, RTL, and Embedded Systems. Proﬁcient in
Verilog and FPGA implementation, with a deep understanding of Computer Architecture. Innovative problem solver currently
leading the development of an AI-powered tool to automate UVM testbench generation, bridging the gap between natural language
processing and hardware verification.
EDUCATION
Bachelor of Engineering in Electrical Engineering (B.E. EE)
School of Electrical Engineering and Computer Science (SEECS) , Islamabad , 3.95/4.00 (2026)
INTERNSHIP EXPERIENCE
National Electronics Complex Of Pakistan (NECOP)
24-Jun-2025 - 23-Sep-2025
• Conducted research and literature review on indigenous FPGA architectures and development ﬂows, gaining hands-on experience
with the OpenFPGA toolchain. • Designed, simulated, and debugged 250+ digital circuits using Verilog/SystemVerilog, leveraging AMD Vivado and Cadence Xcelium, subsequently generating conﬁguration bitstreams for hardware testing. • Analysed FPGA netlists
and architectural constraints to investigate and resolve conﬁguration and bitstream mismatches. • Designed and implemented an RTL-based JTAG interface from scratch; simulated, integrated, and validated it within the top-level FPGA design in Vivado. • Worked
closely with verification teams to validate FPGA designs and improve design–verification integration workflows.
Pakistan Ministry of Railways
29-Jul-2024 - 12-Aug-2024
• Gained practical exposure to electrical subsystems in diesel-electric train engines, including control panels, power distribution, and
engine room operations. • Observed maintenance, testing, and fault diagnosis procedures across multiple departments, developing an understanding of large-scale electrical systems and operational constraints.
M-Labs (Mindstorm Studios)
07-Jun-2024 - 12-Aug-2024
• Contributed to a small team-based software development project using C# within the Unity environment, gaining experience in
collaborative development workflows and rapid prototyping.
Systems Limited
19-Jun-2023 - 25-Jul-2023
• Supported internal IT operations by conﬁguring and maintaining employee workstations and resolving day-to-day technical issues in
a corporate environment.
FINAL YEAR PROJECT
VeriLLM: LLM-Accelerated UVM Testbench Development
Designing and building VeriLLM, a system that bridges the gap between Generative AI and Hardware Veriﬁcation. Addressed the
industry bottleneck of time-consuming boilerplate code by creating a tool that accepts natural language speciﬁcations and outputs
complete, compile-ready UVM class hierarchies. The system aims to successfully automate the creation of components like APB
monitors and drivers, demonstrating the potential of LLMs to accelerate digital design verification workflows.

AI enrichment

Hasan Ahmad is an Electrical Engineering undergraduate with a 3.95 CGPA, specializing in Digital Logic Design, RTL coding, and FPGA implementation. He has gained practical experience through internships at NECOP and M-Labs, focusing on Verilog/SystemVerilog development and hardware verification workflows.

Skills (AI)

["Verilog", "SystemVerilog", "FPGA", "RTL Design", "Digital Logic Design", "Computer Architecture", "UVM", "AMD Vivado", "Cadence Xcelium", "OpenFPGA", "JTAG Interface", "C#", "Unity", "LLM Integration", "Hardware Verification"]

Status: ai_done

Provenance

Source file: SEECS - Electrical Engineering-2026.pdf
From job #259 page 120
Created: 1778168427