Muhammad Hassan Akram

NUST · 2026

hassanakramk140@gmail.com

Phone

923363232724

https://www.linkedin.com/in/hassan-akram-681b0931a?lipi=urn%3Ali%3Apage%3Ad_flagship3_profile_view_base_contact_details%3Br46txyCjQyC6thbjMtD%2BQQ%3D%3D

GitHub

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Academic

Program

Electrical Engineering

CGPA

2.95

Year

2026

Education

SEECS

Address

SD-320 ASKARI 5 MALIR CANTT , Karachi , Pakistan

DOB

—

Career

Current role

—

Target role

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Skills

Embedded C, Digital Logic Design, RISC V, Computer Architecture, C, C++, Python, Verilog/SystemVerilog, Assembly, Vivado, Quartus Prime, STM32CubeIDE, MATLAB, VS Code, Atmel Studio, RISC-V ISA, pipelined processor design, memory hierarchy/interfacing, gem5 simulator, UVM

Verbatim text

The exact text the LLM saw on the page (or the booklet text from the old import). This is what powers semantic search.

Muhammad Hassan Akram
Cell: 923363232724 |  Email: hassanakramk140@gmail.com
LinkedIn: https://www.linkedin.com/in/hassan-akram-681b0931a?
lipi=urn%3Ali%3Apage%3Ad_flagship3_profile_view_base_contact_details%3Br46txyCjQyC6thbjMtD%2BQQ%3D%3D
Address: SD-320 ASKARI 5 MALIR CANTT , Karachi , Pakistan
PROFESSIONAL PROFILE
Final-year Electrical Engineering student with a strong focus on computer architecture, parallel systems, and performance analysis.
Experienced in designing and evaluating SMP-based architectures, cache hierarchies, and memory systems through an in-depth
Final Year Project using architectural simulators and quantitative performance metrics. Solid foundation in processor design concepts, caching, coherence protocols, and system-level analysis, with hands-on experience translating theoretical concepts into practical
simulations and evaluations. Detail-oriented, analytical, and motivated to begin a professional career in hardware systems, computer
architecture, or performance-focused engineering roles.
EDUCATION
Electrical Engineering
SEECS , ISLAMABAD , 2.95 (2026)
INTERNSHIP EXPERIENCE
Nust Chip Design Center (NCDC)
10-Jun-2025 - 29-Aug-2025
Embedded C, Digital Logic Design , RISC V and Computer Architecture
FINAL YEAR PROJECT
Design of a RISC V Based Symmetric Multi Processor
The project involves design, implementation and veriﬁcation of a RISC-V based Symmetric multiprocessor (SMP) architecture. As
processor’s frequency can’t be scaled beyond a certain limit without compromising on power consumption, multiprocessors is a
promising solution for improving performance without compromising power consumption. Objectives: • Design a RISC-V based SMP
architecture and simulating it in gem5 simulator for performance analysis • Implement the design in RTL and perform design veriﬁcation in UVM • Physical design of the SMP architecture (RTL to GDS-II) Scope: This project involves design space exploration
of shared memory architectures. It also encompasses the development of a shared memory architecture that can be scaled up to
eight cores without compromising on memory access bandwidth. A prototype of the project will be developed at RTL level and will
be verified in UVM.
TECHNICAL EXPERTISE
Programming
Proficient in C, C++, Python, Verilog/SystemVerilog, Assembly, and RISC-V Assembly
Tools & Platforms
Experienced with Vivado, Quartus Prime, STM32CubeIDE, MATLAB, VS Code, and Atmel Studio
Computer Architecture
Solid understanding of RISC-V ISA, pipelined processor design, and memory hierarchy/interfacing

AI enrichment

Muhammad Hassan Akram is a final-year Electrical Engineering student specializing in computer architecture, parallel systems, and hardware design. He has practical experience with RISC-V architecture, SMP design, and verification using tools like gem5, UVM, and Vivado.

Skills (AI)

["Computer Architecture", "RISC-V", "Verilog", "SystemVerilog", "UVM", "C", "C++", "Python", "Gem5", "Vivado", "Digital Logic Design", "Embedded C"]

Status: ai_done

Provenance

Source file: SEECS - Electrical Engineering-2026.pdf
From job #259 page 143
Created: 1778168427