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Muhammad Zohaib Mustafa

NUST · 2026

zohaibmustafa27@gmail.com

Phone

923034205075

https://www.linkedin.com/in/muhammad-zohaib-mustafa-a67a6a2b7

GitHub

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Academic

Program

BSE

CGPA

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Year

2026

Education

SEECS

Address

Lahore, Pakistan

DOB

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Career

Current role

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Target role

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Skills

RTL Design, Verilog HDL, SystemVerilog, Digital Logic Design, FSMs, Computer Architecture, RISC-V Processor Design, Pipeline Architecture, Hazard Detection & Forwarding, AMBA AXI & APB Protocols, Embedded C, GPIO & Peripheral Interfacing, UART, SPI, I2C, Sensor Interfacing, Hardware Prototyping, Arduino Uno, ATmega328P, ATmega16A, STM32, 9S12, PID Control, Automatic Voltage Regulation, Buck Converters, System Modeling & Simulation, C, C++, Embedded C, Python, Verilog, SystemVerilog, Assembly Language, MATLAB

Verbatim text

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Muhammad Zohaib Mustafa
Cell: 923034205075 |  Email: zohaibmustafa27@gmail.com
LinkedIn: https://www.linkedin.com/in/muhammad-zohaib-mustafa-a67a6a2b7
Address: IBRAHIEM STREET AND MANZIL REHMANI LAHOREBAZAAR,KOTLAKHPAT, , Lahore , Pakistan
PROFESSIONAL PROFILE
Final-year undergraduate Electrical Engineering student at NUST with strong foundations in RTL design, computer architecture,
embedded systems, and digital hardware design. Hands-on experience in RISC-V processor design, AMBA protocol implementation,
FPGA-based RTL development, and embedded system prototyping through internships and academic projects. Seeking
opportunities to apply digital design, embedded systems, and hardware verification skills in research-oriented or industry roles.
EDUCATION
Bachelor of Electrical Engineering
School of Electrical Engineering & Computer Sciences , Islamabad (2026)
INTERNSHIP EXPERIENCE
NUST Chip Design Center (NCDC)
15-Jun-2025 - 25-Sep-2025
Worked on C programming, RISC-V assembly, digital logic design, and computer architecture through structured projects. Designed
and simulated a 32-bit RISC-V processor (single-cycle and pipelined) with hazard detection and forwarding mechanisms. Designed,
implemented, and tested an AXI-to-APB protocol bridge enabling communication between AXI-based and APB-based modules.
Performed RTL design, simulation, and verification using industry-standard EDA tools.
FINAL YEAR PROJECT
Optimization of Kyber (Post-Quantum Cryptography Algorithm)
Final Year Bachelor’s Project focusing on post-quantum cryptography, speciﬁcally the NIST-approved Kyber algorithm. Analyzing the
existing Kyber architecture to identify performance bottlenecks and optimization opportunities. Applying algorithmic and hardware-
level optimization techniques to improve computational eﬃciency and throughput. Implementing the optimized Kyber design on an
FPGA platform to evaluate speed, latency, and hardware resource utilization. Contributing toward the development of secure and
quantum-resistant cryptographic solutions for future systems.
TECHNICAL EXPERTISE
RTL & Digital Design
RTL Design, Verilog HDL, SystemVerilog, Digital Logic Design, FSMs, Computer Architecture, RISC-V Processor Design, Pipeline
Architecture, Hazard Detection & Forwarding, AMBA AXI & APB Protocols
Embedded Systems
Embedded C, GPIO & Peripheral Interfacing, UART, SPI, I2C, Sensor Interfacing, Hardware Prototyping Microcontrollers: Arduino
Uno, ATmega328P, ATmega16A, STM32, 9S12
Control Systems
PID Control, Automatic Voltage Regulation, Buck Converters, System Modeling & Simulation
Programming Languages
C, C++, Embedded C, Python, Verilog, SystemVerilog, Assembly Language, MATLAB
Development Tools & Platforms

AI enrichment

Muhammad Zohaib Mustafa is a final-year Electrical Engineering undergraduate specializing in RTL design, computer architecture, and embedded systems. He has gained practical experience through internships designing RISC-V processors and AMBA protocol bridges, alongside academic projects in post-quantum cryptography optimization.

Skills (AI)

["RTL Design", "Verilog HDL", "SystemVerilog", "RISC-V Processor Design", "AMBA AXI/APB Protocols", "Embedded C", "FPGA Development", "Digital Logic Design", "Computer Architecture", "Python", "C++", "STM32", "PID Control"]

Status: ai_done

Provenance

Source file: SEECS - Electrical Engineering-2026.pdf
From job #259 page 214
Created: 1778168428