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Hasnat Ahmed Gill

NUST · 2026

antash.ahmed@yahoo.com

Phone

923175907106

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GitHub

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Academic

Program

BSE

CGPA

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Year

2026

Education

SEECS

Address

VILLAGE GILL WALA TEHSIL WAZIRABAD DISTRICT GUJRANWALA , Rawat , Pakistan

DOB

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Career

Current role

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Target role

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Skills

FPGA-based design, Verilog RTL, Secure hardware design, Cryptographic systems, Post-quantum systems, RISC-V processors, Computer architecture, Floating-point architecture, Algorithm-to-hardware mapping, MATLAB/Simulink, DSP applications, Embedded software, Intel DE1-SoC, Embedded Linux, Hardware–software co-design, ARM–FPGA integration, Linux device drivers, Peripheral interfacing, GCC toolchain, JTAG/UART, Real-time embedded systems, FPGA-based prototyping, Processor design, Digital systems simulation, Multiplier architectures (Dadda, Wallace tree), Digital encoding, Signal processing modules, RTL development, Simulation, Synthesis, Digital logic optimization, Lightweight cryptography, ASCON algorithm, Hardware accelerator architecture, LFSR-based randomness, Performance trade-off analysis

Verbatim text

The exact text the LLM saw on the page (or the booklet text from the old import). This is what powers semantic search.

Hasnat Ahmed Gill
Cell: 923175907106 | Email: antash.ahmed@yahoo.com
Address: VILLAGE GILL WALA TEHSIL WAZIRABAD DISTRICT GUJRANWALA , Rawat , Pakistan
PROFESSIONAL PROFILE
Electrical Engineering undergraduate with expertise in FPGA-based design and Verilog RTL. Research includes secure hardware
design for cryptographic and post-quantum systems, RISC-V processors, computer architecture techniques for performance
optimization and ﬂoating-point architecture. Skilled in algorithm-to-hardware mapping, MATLAB/Simulink modeling, and performance
optimization for cryptographic and DSP applications.
EDUCATION
No education information provided.
INTERNSHIP EXPERIENCE
ESDAC Research Laboratory NUST
17-Jun-2024 - 30-Aug-2024
Developed and deployed embedded software on Intel DE1-SoC board running an embedded Linux environment. I Implemented
hardware–software co-design workﬂows for ARM–FPGA integration and then optimized Linux device drivers and peripheral
interfacing for high-performance embedded applications. After that conducted cross-compilation and debugging using GCC toolchain
and on-board JTAG/UART interfaces and contributed to research in real-time embedded systems and FPGA-based prototyping for
industrial use cases.
System on Chip Lab
31-Aug-2024 - 30-Sep-2024
I have developed and implemented processor designs in Verilog to strengthen my understanding of computer architecture. My work
includes designing and simulating digital systems with optimized multiplier architectures, such as Dadda and Wallace tree multipliers. I have also implemented digital encoding and signal processing modules on FPGA platforms for real-time hardware validation,
gaining hands-on experience with FPGA design workflows, RTL development, simulation, synthesis, and digital logic optimization.
System on Chip Lab
23-Jun-2025 - 28-Jan-2026
I conducted research on secure hardware design for lightweight cryptography, focusing on the ASCON algorithm. I designed a
hardware accelerator architecture for ASCON using Verilog RTL and implemented it on FPGA platforms. My work included
developing key and nonce generation modules using LFSR-based randomness, as well as implementing the initialization and
permutation rounds of the ASCON cipher on the DE1-SoC board. I also analyzed performance trade-oﬀs in terms of area,
throughput, and latency to evaluate and optimize the hardware cryptographic design.
FINAL YEAR PROJECT
No project information available.
TECHNICAL EXPERTISE

AI enrichment

Hasnat Ahmed Gill is an Electrical Engineering undergraduate specializing in FPGA-based design, Verilog RTL, and secure hardware for cryptographic systems. He has gained practical experience through internships involving embedded Linux, ARM-FPGA integration, and RISC-V processor design.

Skills (AI)

["Verilog RTL", "FPGA Design", "Embedded Systems", "Linux Device Drivers", "ARM-FPGA Integration", "Computer Architecture", "Digital Logic Optimization", "Cryptographic Hardware Design", "ASCON Algorithm", "RISC-V", "MATLAB/Simulink", "DSP Applications"]

Status: ai_done

Provenance

Source file: SEECS - Electrical Engineering-2026.pdf
From job #259 page 221
Created: 1778168428