Ali Masood Khan

PROFESSIONAL PROFILE The rise in Edge computing and localized calculation has sparked my interest in developing optimized hardware accelerators, GPUs and memory systems. I intend to excel in the industry and gain valuable insight and experience to develop better IPs and solutions by use of my cognitive and social abilities. EDUCATION BS Electrical Engineering National University of Sciences and Technology , Islamabad , 3.42 (2026) INTERNSHIP EXPERIENCE NUST CHIP DESIGN CENTER 19-Feb-2025 - 25-Sep-2025 • Implemented a Fire Detection FSM after learning about procedural blocks, Enumerations and Design Hierarchy. Introduced to configurable design using parameters. • Learned how to inspect and debug memory, solve stack errors and segmentation faults, analyze core dumps using GDB for Linux. • Worked on RISC-V based ISA and implemented sorting algorithms in assembly using venus. • Built a single cycle RISC-V32I processor and then pipelined it, which later required hazard handling. The processor was able to run Machine code without hindrance. • Wrote testbenches to verify top and hidden modules in projects. • Thorough review of computer architecture and C programming. PAKISTAN ORDNANCE FACTORIES 01-Aug-2024 - 01-Sep-2024 • Worked in the Drawing office and calculated load and cable requirements for a neighborhood in Wah Cantt. • Learned how to read Elecrical drawings and use AutoCAD. • Gained insightful experience on how an organization runs itself. Observed maintenance and improvement of a system using PLCs. ELECTRONIC SYSTEM DESIGN AUTOMATION CENTER, NUST 03-Jun-2024 - 31-Jul-2024 • Bare metal programming on DE-10 SoC board. • Ran Linux kernel on the HPS of DE-10 SoC board(ARM Cortex A9.) • Developed Linux applications that communicate with FPGA hardware including kernel and character drivers and I/O peripherals like accelerometer. • Other tasks included running FPGA accelerated DSP algorithms. Made a Canny Edge Detector implementation on the FPGA and used DMA to access images and calculate edges. FINAL YEAR PROJECT Design of Real-time 360 degrees image-stitching for Panoramic Vision Systems on FPGA • The FPGA being used is XC7Z020-1CLG4C featured on the Zybo Z7-20. • Literature Review of image stitching and Feature detection algorithms. • Proposed an customized ORB for feature detection. • Used OpenCV’s image stitching algorithms to get compare different techniques. • Built HLS implementations of FAST, rBRIEF • Designed and finalized Micro-architecture for HDL implementation. • Currently working on designing AXI interfaces and Memory Controller for DDR access My contribution includes the interfacing of the modules using AXI and building sub-modules for ORB and gaussian pyramids. TECHNICAL EXPERTISE Python and OpenCV

The rise in Edge computing and localized calculation has sparked my interest in developing optimized hardware accelerators, GPUs and memory systems. I intend to excel in the industry and gain valuable insight and experience to develop better IPs and solutions by use of my cognitive and social abilities.