Maheen Abdullah

PROFESSIONAL PROFILE Final-year Electrical Engineering student specializing in digital chip design and RISC-V architectures, with hands-on experience in RTL-level design, PCB development, and embedded systems . Actively trained at the NUST Chip Design Centre (NCDC) through an intensive, exam-based program covering C programming, Digital Logic Design, Computer Architecture, and RISC-V, with sustained full-time summer and part-time semester engagement. Strong foundation in VLSI, microprocessor systems, and hardware-software integration, with proven ability to learn complex systems quickly and deliver under demanding technical environments. EDUCATION Bachelors of Electrical Engineering (BEE) School of Electrical Engineering and Computer Sciences (SEECS) , Islamabad , 3.07 (2026) INTERNSHIP EXPERIENCE NUST Chip Design Centre (NCDC) 18-Feb-2025 - 01-Aug-2025 Completed an intensive, structured chip design training program involving labs, vivas, and written examinations. Successfully finished technical modules in C Programming, Digital Logic Design (DLD), Computer Architecture, and RISC-V ISA. Worked 20 hours/week during semesters and 40 hours/week during summer, demonstrating consistency, discipline, and professional commitment. Currently engaged in a Final Year Project on RISC-V Vector Processor Extension, focusing on architectural understanding and RTL-level concepts. Gained exposure to hardware-oriented problem solving, design validation, and systematic debugging. MINE Lab, NUST 02-Jun-2024 - 31-Aug-2026 Designed and simulated analog and digital PCB layouts using Altium Designer. Performed schematic capture, simulation, and PCB fabrication workflows. Designed and implemented a Battery Overcharge Protection System, fabricated and tested on PCB. Applied concepts from Electronic Devices, Circuit Design, and Power Electronics in real hardware projects. Graduate Research Lab, NUST 01-Jan-2025 - 31-Jan-2026 Control Systems Intern Assisted in control system modeling and analysis tasks under research supervision. Gained exposure to research-oriented problem formulation and validation methods. Developed foundational understanding of control system behavior and performance analysis. FINAL YEAR PROJECT Design and Implementation of a RISC-V Based Vector Processor Currently designing and implementing a custom RISC-V vector processor to accelerate data-parallel computations. Developing a parameterized vector ALU with configurable VLEN, SEW, and LMUL, supporting integer vector operations (ADD, SUB, logical operations, MIN/MAX, MAC). Implementing vector control logic, including masking, tail handling, and element-wise execution. Integrating the vector unit with a scalar core using a PCPI-based interface and memory-mapped communication. Verifying functionality through SystemVerilog testbenches, simulation, and waveform analysis in Vivado. Targeting applications in machine learning, AI, and cryptography, with a focus on scalability and performance. TECHNICAL EXPERTISE

Final-year Electrical Engineering student specializing in digital chip design and RISC-V architectures, with hands-on experience in RTL-level design, PCB development, and embedded systems . Actively trained at the NUST Chip Design Centre (NCDC) through an intensive, exam-based program covering C programming, Digital Logic Design, Computer Architecture, and RISC-V, with sustained full-time summer and part-time semester engagement. Strong foundation in VLSI, microprocessor systems, and hardware-software integration, with proven ability to learn complex systems quickly and deliver under demanding technical environments.