Muhammad Saad Farooq
NUST
· 2026
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422095
Email
sfarooq.bee22seecs@seecs.edu.pk
Phone
923004144759
GitHub
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Academic
Program
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CGPA
2.82
Year
2026
Education
Bachelors Electrical Engineering
School of Electrical Engineering & Computer Sciences , Islamabad (2026)
Address
HOUSE#121-B STREET#32/S HAMEED ALI PARK JINNAHCOLONY ICHRA , Lahore , Pakistan
DOB
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Career
Current role
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Target role
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Skills
PROFESSIONAL PROFILE
Final-year undergraduate Electrical Engineering student at NUST with strong interests in RTL design, computer architecture,
embedded systems, FPGA-based design, and AI accelerators. Experienced in Verilog-based digital design, FPGA development, and
machine learning through hands-on internships and academic projects. Seeking opportunities to apply hardware–software co-design,
AI acceleration, and digital system design skills in research-oriented or industry environments.
EDUCATION
Bachelors Electrical Engineering
School of Electrical Engineering & Computer Sciences , Islamabad (2026)
INTERNSHIP EXPERIENCE
National Engineering Complex of Pakistan
24-Jun-2025 - 23-Nov-2025
Designed and verified combinational and sequential digital circuits (logic gates, flip-flops, FSMs) using Verilog, strengthening RTL
design and verification skills. Developed FPGA-based projects using Xilinx Vivado IPs and prepared structured documentation and
presentations explaining design flow and functionality. Integrated and tested communication protocols including I2C, SPI, and UART,
gaining hands-on debugging and interfacing experience. Improved design efficiency and reliability through modular coding practices
and systematic testing.
Machine Learning Intern – Digital Empowerment Pakistan
05-Feb-2023 - 06-Mar-2023
Gained practical experience in AI, Machine Learning, Deep Learning, CNNs, and image processing. Worked with PyTorch,
TensorFlow, and Google Colab for model development and optimization. Used Python for data preprocessing and image analysis
tasks.
FINAL YEAR PROJECT
High-Speed AI Accelerator for Real-Time Applications
Designing and implementing an FPGA-based AI accelerator on the Xilinx ZCU102 platform for real-time deep learning workloads.
Optimizing convolution layers and MAC processing elements using a systolic array architecture to achieve high throughput and low
latency. Evaluating accelerator performance against CPU/GPU implementations in terms of speedup, resource utilization, and
accuracy. Targeting real-time deployment of vision-based AI models such as YOLOv8. Tools & Technologies: Verilog HDL, Xilinx
Vivado, ZCU102 FPGA, AI/ML Models
TECHNICAL EXPERTISE
RTL & FPGA Design
RTL Design, Verilog HDL, SystemVerilog, Computer Architecture, RISC-V Processor Design, Digital System Design, Hardware
Verification, AXI Interface, Systolic Array Architecture, FPGA Implementation
Embedded Systems
Embedded C, Microcontroller Programming, GPIO & Peripheral Interfacing, I2C, SPI, UART Microcontrollers: Arduino, ATmega328P,
ATmega16A, STM32, ESP32 Tools: Arduino IDE, Atmel Studio, STM32CubeIDE
AI enrichment
Final-year undergraduate Electrical Engineering student at NUST with strong interests in RTL design, computer architecture,
embedded systems, FPGA-based design, and AI accelerators. Experienced in Verilog-based digital design, FPGA development, and
machine learning through hands-on internships and academic projects. Seeking opportunities to apply hardware–software co-design,
AI acceleration, and digital system design skills in research-oriented or industry environments.
Status: ai_done
Provenance
Source file: —Created: 1777448793