Aneeq Ur Rehman

PROFESSIONAL PROFILE Electrical Engineering graduate from NUST with hands-on experience across hardware design, applied software development, and research-driven engineering. Worked with Korea EHT on automating industrial workflows using Python and AI, including CAD drawing processing, ambient temperature data pipelines, and rule-based recommendation systems that removed large amounts of manual effort for EPC clients. Experience spans both structured internships and independent contracting. Research experience includes physical-layer modeling of optical networks at ONT Lab, NUST, with OptiSystem MATLAB co- simulations and implementation of sigma-delta modulator–based systems for 5G/C-RAN links. Strong background in digital and ASIC design, including RTL development, microarchitecture design of a RISC-V core, and an ongoing final-year project focused on a hardware accelerator for the NTT in CRYSTALS-Kyber. Comfortable working across the stack from embedded C/C++ and RTOS to Python, Verilog/SystemVerilog, and PyTorch, while balancing independent problem-solving with collaborative research and mentoring junior team members. EDUCATION Electrical Engineering(EE) SEECS , ISLAMABAD , 3.33 (4) INTERNSHIP EXPERIENCE Korea EHT 09-Jul-2025 - 25-Jan-2026 Designing algorithms and developing for company’s heat trace CAD drawing’s automated processing using AI, as an independent contractor. Korea EHT 20-Jul-2024 - 18-Sep-2024 Automated the collection of ambient temperature data making the process requiring zero manual labor for EPC clients as well as company Implemented Software to use this data in recommendation software to suggest suitable heating cables based on the training sessions Processed Line List documents containing around 1,000 pipes each, automating the selection of suitable heating cables for each pipe, significantly reducing manual labor and improving efficiency Technical training regarding specifications, Heat Trace types, wiring, conditions and factors to account for. ONT Lab, NUST 01-Jul-2025 - 25-Jan-2026 Research intern - Physical layer modelling of optical networks Worked on research related to the physical layer of optical networks. Developed OptiSystem and MATLAB co-simulations to model advanced optical communication systems. Designed and implemented a sigma-delta modulator–based system for 5G/C-RAN applications, enabling long-distance transmission between the BBU and RRH. Built custom digital filters, analyzed signal constellations, and validated results through literature review and application of established techniques. Guided junior team members while balancing independent research with collaborative discussions, fostering knowledge- sharing and effective teamwork. Pakistan Railways 29-Jul-2024 - 10-Aug-2024 Gained exposure to large-scale production processes, learning precision techniques such as jigs and fixtures to enhance manufacturing efficiency. Learned the challenges and requirements that need to be satisfied in working with international partners while adhering to PPRA rules Developed an understanding of the internal collaboration between various departments for smooth

Electrical Engineering graduate from NUST with hands-on experience across hardware design, applied software development, and research-driven engineering. Worked with Korea EHT on automating industrial workflows using Python and AI, including CAD drawing processing, ambient temperature data pipelines, and rule-based recommendation systems that removed large amounts of manual effort for EPC clients. Experience spans both structured internships and independent contracting. Research experience includes physical-layer modeling of optical networks at ONT Lab, NUST, with OptiSystem MATLAB co- simulations and implementation of sigma-delta modulator–based systems for 5G/C-RAN links. Strong background in digital and ASIC design, including RTL development, microarchitecture design of a RISC-V core, and an ongoing final-year project focused on a hardware accelerator for the NTT in CRYSTALS-Kyber. Comfortable working across the stack from embedded C/C++ and RTOS to Python, Verilog/SystemVerilog, and PyTorch, while balancing independent problem-solving with collaborative research and mentoring junior team members.